Denali Software, Inc. (Denali Software, Inc., Headquarters: California, U.S.A., President, CEO: Sanjay K. Srivastava), a leading memory controller IP provider, and Tokyo Electron Device, Ltd. (Headquarters: Tsuzuki-ku, Yokohama, President: Toshiaki Sunagawa), an electronics technology and trading company focused on semiconductor products, announce simultaneously in Japan and the U.S.A. that they will work together to develop and release DDR2 SDRAM PHY Design running on Virtex-5, the largest and fastest FPGA in the world, produced by Xilinx, Inc., compatible with DDR PHY Interface (DFI), which is a standard interface for DDR memory controller and PHY.


Release of DDR2 SDRAM PHY helps to develop LSI faster with less risk using a high-speed DDR2 interface, relieving developers of time-consuming development and integration tasks needed for special designing of the DDR memory controller. Combining DDR2 SDRAM PHY, Denali's memory controller design IP "Databahn" featuring technology proven in LSI implementation and Tokyo Electron Device's "inrevium" brand "Virtex-5 Multi-Application Evaluation Platform (TB-5V-LX110/220/330-DDR2)," developers can effectively improve the time-to-market cycle.


About DDR PHY Interface (DFI)

The goal of the DFI specification is to define a common interface between memory controller logic and DDR PHY interface to reduce cost and time-to-market while increasing the potential for reusing the individual components that compose the memory system. The DFI specification is being developed by expert contributors from recognized leaders in the semiconductor, IP, and electronic design automation (EDA) industries including ARM, Denali, Intel, Rambus, Samsung, and Synopsys.
DFI Specification Rev 1.0 was released for production development in January 2007 and is available online at: http://www.ddr-phy.org.




Advantages of DFI

• Significantly reduces memory controller design work
  - Relieves developers of time-consuming work such as development and integration
  - Verification tasks can easily be classified
  - Commercial IP compatible with DFI can be used
  
  
• Enables ASIC/FPGA vendor selection
  - Increases vendor options
  - Reduces integration work specific to a vendor
  - Reduces load in reusing design
  
  
• Seamless integration from FPGA prototype to ASIC
  - Accelerates design process
  - Reduces risk factors
  

This DDR2 SDRAM PHY Design source is provided using verilog HDL, which can be downloaded from the Tokyo Electron Device Web site.


Denali Quote

"We are pleased that DFI compatible DDR enabled seamless integration from FPGA to ASIC, which has been a challenging issue for a long time. We are anticipating DFI will quickly spread and Databahn will increasingly be accepted."
Kenichi Sakamaki, General Manager of Denali Software K.K.

Xilinx Quote

DFI certified "DDR2 SDRAM PHY Design" provides Designers to develop LSI faster and less risk." Tadashi Arai, Director of Marketing Department, Xilinx KK. "We feel that Xilinx Virtex-5 FPGA and this PHY design provide Designers more effective way for both of ASIC Prototyping and mass-production with DDR2 controller design.

Tokyo Electron Device Quote

"We are delighted we could develop DFI DDR2 SDRAM PHY Design for Virtex-5, which is Xilinx's state-of-the-art FPGA, with the support of Denali Software, Inc. We expect this release will accelerate the promotion of Virtex-5 as well as our evaluation platform and design services in the world wide."
Masami Hasegawa, Director & Xilinx product Manager of Tokyo Electron Device, Ltd.


    Virtex-5 Multi-Application Evaluation Platform


For more information about "DDR2 SDRAM PHY Design"
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About Denali

• Denali Software, Inc., headquartered in Palo Alto, California, is an IP vendor providing design solutions for chip interface such as the standard bus. Denali's products including the proven design IP "Databahn" and industry standard memory verification IP "MMAV" are widely used by many global companies.
  
  
• Home page: http://www.denalisoft.com
  
  
• Denali Software Japan Co., Ltd.: http://www.denalisoft.co.jp
  

• Tokyo Electron Device, Ltd. is a technical trading company of electronic components devices focused on semiconductor products and computer network. Utilizing a rich background of experience in design and development technology at the design development center established in 1985, TED is actively engaged in developing "inrevium?" brand products as well as commissioned design and development work.
  
  
• Home page: http://www.inrevium.jp/eng/
  
  
• Japanese site: http://ppg.teldevice.co.jp/
  

Customer Contact:
Takashi Nagatani, PLD Solution, Tokyo Electron Device, Ltd.
TEL: 045-474-7028, E-mail: nagatani.t@teldevice.co.jp