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| IP Core for Xilinx FPGA>> |
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| V-by-One®HS IP Core |
 The V-by-One®HS standard has been developed by THine Electronics Inc. to offer capabilities for FPD markets that are requiring ever-higher frame rates and higher resolutions.
Tokyo Electron Device (TED) offers the V-by-One®HS IP Core for Xilinx FPGA that achieves reducing the cable pairs, costs and time to market.
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Targets a high speed video signal transmittion based on internal connection of the equipment. |
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Up to 3.75Gbps data rate (effective data rate 3Gbps) per lane. |
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Data scrambling and Clock Data Recovery (CDR) to reduce EMI. |
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CDR solves the skew problem between clock and data at conventional transfer system. |
Resolution |
Refresh rate
(Pixel Clock) |
Color depth * |
No. of
Data Lane |
HD |
60Hz (74.25MHz) |
18/24/30/36 bit |
1 |
120Hz (148.5MHz) |
18/24/30/36 bit |
2 |
240Hz (297MHz) |
18/24/30/36 bit |
4 |
Full-HD |
60Hz (148.5MHz) |
18/24/30/36 bit |
2 |
120Hz (297MHz) |
18/24/30/36 bit |
4 |
240Hz (594MHz) |
18/24/30/36 bit |
8 |
4Kx2K |
60Hz (594MHz) |
18/24/30/36 bit |
8 |
120Hz (1188MHz) |
8/24/30/36 bit |
16* |
240Hz (2376MHz) |
18/24/30/36 bit |
32 * |
*Supported color depth & data lanes by IP Core depend on the target FPGA sevice.
*Design service for 16 or 32 lanes is available.
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Up to 3.75Gbps data rate per lane on Virtex®-6 (Up to 3.125Gbps on Spartan®-6) |
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1, 2, 4, and 8 lanes operation (Design service for 16 and 32 lanes are available) |
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Variable settings of driver swing, pre-emphasis and equalizer. |
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Flexible implementation and package compatibility. |
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Spartan®-6 FPGA |
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Virtex®-6 FPGA |
Core resources of the refference design that has 4-data lanes is shown in the following table.
So the smallest devices are available to implement the design including the core.
Spartan®-6 FPGA Family : XC6SLX25T (Slices: 30%),
Virtex®-6 FPGA Family : XC6VLX75T (Slices: 10%)
Core Resources(4-data lanes) |
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Transmitter |
Receiver |
Slices |
1,000 |
1,050 |
LUTs |
2,300 |
2,400 |
FFs |
2,900 |
3,350 |
BlockRAM |
20 |
20 |
PLLs |
3 |
3 |
BUFGs |
7 |
8 |
| Part number |
| Project License |
TIP-VBY1HS-PROJ |
| Site License |
TIP-VBY1HS-SITE |
>>Spartan-6 FPGA Consumer Video Kit
For more information contact:
Request |
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Tokyo Electron Device Limited, software programs, technical data and
products may not be exported or re-exported, either directly or indirectly,
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Administration. |
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