MECHATROLINK-III Master/Slave IP Core /inrevium

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Field Network Solution

MECHATROLINK-III Master/Slave IP Core

It is the best for the network that emphasis on precise synchronous control and high speed.

MECHATROLINK-III developed by MECHATROLINK Members association as a standard, to satisfy the demand of the motion field network market, high more than before a transmission speed, the transmission cycle time, and the transmission distance and the number of maximum slaves required.

Features

	User-selectable : Master/Slave
	Have CPU built-in FPGA is intelligent function to use RTOS be achieved with 1chip.
	Connet CPU :16bit、8bit Connect FPGA internal resource : asynchronous buss
	Max 66MHz Clock, High-speed, synchronous buss as PCI Express in the connection, it is possible to connect it without decreasing throughput.

Function Specification	MECHATROLINK-III
Physical Layer	Ethernet
Baud Rate	100 Mbps
Transmission Cycle Time	31.25 µs to 64 ms*
String Size	8/16/32/48/64 bytes (Different string sizes can be used as the same time)
Number of Slaves	62 max.
Maximum Transmission Distance	100 m between stations 0.5 m
Minimum Distance between Stations	0.2 m
Topology	Cascade, star, or point-to-point
Cyclic/Event-driven Communications	Cyclic and event-driven communications supported.
Message Communications	Available

Core specification

	Network：MECHATROLINK-III Network ×2 Port （For MII interface 100Mbps Full Duplex mode)
	Host interface：32bit Joint memory interface / 32bit register interface
	Interrupt：2 interrupt interrupt output
	Endian：little endian

System configuration diagram

Block Diagram

Support FPGA

	Spartan-6 LX FPGA
	Spartan-6 LXT FPGA

Resource

Configuration Function	SlicesSlices	Registers	Logic (LUT6s)	BRAM (RAMB16)
Master / Slave	1000	4000	8000	26

Order information

Site license ： TIP-ML3-SITE
(Deliverable : Netlist)

>>MECHATROLINK MEMBERS ASSOCIATION Web site

>>Xilinx Web site　(Press release)

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